Berkeley  Neuromorphic
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Three broad approaches are under development.  We have a business partnership with General Vision, Inc. to utilize their proprietary digital neurons in the form of IP, which we also license for on-shore and federal purposes.  Having been involved in the development process for the Berkeley RISC-V ISA, we are pairing those neurons with and open-souce core to create a low-power NeuroSOC (both as a package-scale device as well as dedicated silicon), including the Linux API for access.  For datacenter and HPC deployment, we are designing the second-generation PCIe acceleration hardware, targeting individual 1-32K neuron chips initially but expanding to wafer-scale MCMs. Several applications have been deployed on test hardware by our collaborators: industrial inspection, components of autonomous vehicle operation, and latent semantic analytics.

Intellectual Property
  • NeuroMem® neuron IP licensed from General Vision.
  • RISC-V IP (32- 64- and 128-bit systems and connectivity) and design consultancy
  • FPGA-optimized functional platforms​
®Registered technology of Norlitech, LLC
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NeuroSOC
V0: FPGA emulated systems
  1. hard ARM+neurons
  2. soft RISC-V+neurons​
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​​V1: Integrated package
  1. RISC-V 64-bit
  2. NM500
  3. SRAM--potentially memristors.

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V2: high density neurons
  1. RISC-V 128-bit
  2. Multiple NM500
  3. RRAM

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Data Analytics Platforms
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​Gen 1: NeuroBlast® host-attached systems x8 PCIe​

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​Gen 2: x16 very high BW incorporating NeuroSOCs ​

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